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Agilent ADNS-3040 Ultra Low-Power Mouse Sensor
Data Sheet
Features * Low power architecture Description The ADNS-3040 is an ultra low-power optical navigation sensor. It has a new, lowpower architecture and automatic power management modes, making it ideal for battery-and power-sensitive applications such as cordless input devices. The ADNS-3040 is capable of high-speed motion detection - up to 20 ips and 8G. In addition, it has an on-chip oscillator and LED driver to minimize external components. The ADNS-3040 along with the ADNS-3120-001 lens, ADNS2220 clip and HLMP-ED80PS000 LED form a complete and compact mouse tracking system. There are no moving parts, which means high reliability and less maintenance for the end user. In addition, precision optical alignment is not required, facilitating high volume assembly. The sensor is programmed via registers through a four-wire serial port. It is packaged in a 20-pin DIP. Theory of Operation The ADNS-3040 is based on Optical Navigation Technology, which measures changes in position by optically acquiring sequential surface images (frames) and mathematically determining the direction and magnitude of movement. The ADNS-3040 contains an Image Acquisition System (IAS), a Digital Signal Processor (DSP), and a four wire serial port. The IAS acquires microscopic surface images via the lens and illumination system. These images are processed by the DSP to determine the direction and distance of motion. The DSP calculates the x and y relative displacement values. An external microcontroller reads the x and y information from the sensor serial port. The microcontroller then translates the data into PS2, USB, or RF signals before sending them to the host PC or game console. * Self-adjusting power-saving modes for longest battery life * High speed motion detection up to 20 ips and 8G * SmartSpeed self-adjusting frame rate for optimum performance * Motion detect pin output * Internal oscillator - no clock input needed * Selectable 400 and 800 cpi resolution * Wide operating voltage: 2.5V-3.6V nominal * Four wire serial port * Minimal number of passive components Applications * Optical Mice * Optical trackballs * Integrated input devices * Battery-powered input devices
Pinout of ADNS-3040 Optical Mouse Sensor
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name NCS MISO SCLK MOSI MOTION XY_LED LED_GND NC AGND SHTDWN AVDD GND GND AGND VDD GND NC NC AGND NC Description Chip select (active low input) Serial data output (Master In/Slave Out) Serial clock input Serial data input (Master Out/Slave In) Motion Detect (active low output) LED control Ground for LED current No connection Analog Ground Shutdown (active high input) Analog Supply Voltage Ground Ground Analog Ground Supply Voltage Ground No connection No connection Analog Ground No connection
TOP VIEW
20 NCS MISO SCLK MOSI MOTION XY_LED LED GND NC AGND SHTDWN 1 19 2 3 4 16 5 15 6 14 7 13 8 12 9 11 10 AVDD GND GND AGND VDD GND AGND NC NC NC
A3040 XYYWWZ
18 17
PINOUT
Figure 1. Package outline drawing (top view)
Pin #1
A3040 XYYWWZ
12.85 0.506 9.10 0.358
(At Shoulder)
22.30 0.878
5.43 0.214
7.05 0.278
90 3
Lead Offset 1.00 0.039 Lead Width 0.50 0.020 Lead Pitch 2.00 0.079
0.25 0.010 12.85 0.65 (At Lead Tip) 0.506 0.26
6.025 0.2372
5.60 0.220 5.0 0.197 Protective Kapton Tape
4.55 0.179 Pin #1 1.05 0.041 13.38 0.527
Notes: 1. Dimension in millimeters(inches). 2. Dimension tolerence of 0.1mm. 3. Coplanarity of leads: 0.01mm. 4. Lead pitch toleronce: 0.15mm. 5. Cummulative pitch tolerance: 0.15mm. 6. Angular tolerance: 3.0. 7. Maximum flash + 0.2mm 8. Chamfer (25 x 2) on the taper side of the lead. 9. * These dimension are for references only and should not be used to mechanically reference the sensor.
Figure 2. Package outline drawing
2
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD
Overview of Optical Mouse Sensor Assembly Agilent Technologies provides an IGES file drawing describing the base plate molding features for lens and PCB alignment. The components interlock as they are mounted onto defined features on the base plate. The ADNS-3040 sensor is designed for mounting on a through-hole PCB, looking down. There is an aperture stop and features on the package that align to the lens. The ADNS-3120-001 lens provides optics for the imaging of the surface as well as illumination of the surface at the optimum angle. Features on the lens align it to the sensor, base plate, and clip with the LED. The ADNS-2220 clip holds the LED in relation to the lens. The LED must be inserted into the clip and the LED's leads formed prior to loading on the PCB. The clip interlocks the sensor to the lens, and through the lens to the alignment features on the base plate. The HLMP-ED80-PS000 LED is recommended for illumination.
43.13 1.698 42.53 1.674 39.06 1.538 1.50 0.059 1.00 0.039 29.50 1.161 28.13 1.107 2X 3.55 0.140
1.22 3.22 0.048 0.127
12.60 0.496
11.38 0.448 1.28 0.050
0 5.06 0.199
13.88 0.546 7.60 0.299
15.88 0.625
0
Clear Zone
20X 0.80 Recommended 0.031 Dimensions in millimeters / inches
Figure 3. Recommended PCB mechanical cutouts and spacing
3
Lens
43.96 1.731
Base Plate
19.10 0.752
Gap between sensor lead and lens gate 0.119 0.005
Top of PCB to top of lens flange 3.75 0.148 Plastic Spring Clip
3.00 Top of PCB to top 0.118 of Lens gate
15.90 0.626 Sensor Surface 16.61 0.654 12.61 0.496 7.45 0.293 PCB Base Plate Alignment Post
Bottom of sensor 1.98 to top of PCB 0.078
Dimension in Millimeters / Inches
Figure 4. 2D Assembly drawing of ADNS-3040 (top and side view)
HLMP-ED80-PS000 (LED) ADNS-2220 (Clip) ADNS-3040 (Sensor)
Customer supplied PCB
ADNS-3120-001 (Lens)
Customer supplied base plate with recommended alignment features per IGES drawing
Figure 5. Exploded view
4
PCB Assembly Considerations 1. Insert the sensor and all other electrical components into PCB. 2. Insert the LED into the assembly clip and bend the leads 90 degrees. 3. Insert the LED/clip assembly into PCB. 4. Wave Solder the entire assembly in a no-wash solder process utilizing solder fixture. The solder fixture is needed to protect the sensor during the solder process. It also sets the correct sensor-to-PCB distance as the lead
shoulders do not normally rest on the PCB surface. The fixture should be designed to expose the sensor leads to solder while shielding the optical aperture from direct solder contact. 5. Place the lens onto the base plate. 6. Remove the protective kapton tape from optical aperture of the sensor. Care must be taken to keep contaminants from entering the aperture. Recommend not to place the PCB facing up during the entire mouse assembly process.
Recommend to hold the PCB first vertically for the kapton removal process. 7. Insert PCB assembly over the lens onto the base plate aligning post to retain PCB assembly. The sensor aperture ring should selfalign to the lens. 8. The optical position reference for the PCB is set by the base plate and lens. Note that the PCB motion due to button presses must be minimized to maintain optical alignment. 9. Install mouse top case. There MUST be a feature in the top case to press down onto the clip to ensure all components are interlocked to the correct vertical height. Design considerations for improved ESD Performance For improved electrostatic discharge performance, typical creepage and clearance distance are shown in the table below. Assumption: base plate construction as per the Agilent supplied IGES file and ADNS-3120-001 lens.
ADNS-3040
Power and control
VDD AVDD
NCS SCLK
Serial Port and Registers
GND AGND SHTDWN
Image Array
MOSI MISO MOTION
DSP
Oscillator
XY_LED
LED Drive
Typical Distance Creepage Clearance
LED
Millimeters 16.0 2.1
Figure 6. Block diagram of ADNS-3040 optical mouse sensor
Clip Sensor
PCB Lens / Light Pipe
Base Plate Surface
Figure 7. Sectional view of PCB assembly highlighting optical mouse components Note that the lens material is polycarbonate and therefore, cyanoacrylate based adhesives or other adhesives that may damage the lens should NOT be used.
5
3 C10
100nF 100uF
MAX1722
VDD MVDD IRQ 11 10 Q2 MMBT3904 PTC0 RST 20 C19 10nF
R18 27 C19 47nF
R21 Open
C12 47pF
MC68HC908QY4
R26 1M
8 C8 16 15 4 PTA1 PTB2 VSS PTA0
100nF
ADNS-3040
R22 10K
MC68HC908JB12
6
U3
BAT+1 C11
100uF
L1 22uH LX 5 R8 10 MVDD VDD R10 10 AVDD R11 10 LVDD R12 10 R9 10 OUT 4 C9 VDDA
1 2 FB GND
BATT
BAT-1
R6 R7 1M 1.1M
3 2 3 1
LB
U2
8 14 11 6 PTB6 PTA2 PTB0 3 R3 100K PTB5 VDD 7 13 10 PTA5 PTA4 PTA3 PTB7 PTB4 PTB3 1 2 3 4 5 10
U1
NCS MISO
MB
1
VDD
2 3
15 C1 1uF
GND
VDD C2 10nF 16
SCLK GND
U4
C17 30pF
2 1
RB 12
9
13
MOSI GND
USB BUS OSC1 2
VDD Z2
VREG Z-Wheel R25 X1 10M 12MHz C18 30pF R4 Open 5
G2 Z1 G1
C14 OSC2 3 VDDA R27 1M R1 0 4 2 R2 100K 3 2 PTB1
4
GND
C13 47uF
100nF
L2
R20 1K5
12
MOTION AVDD
D+
PTE3
AVDD 11 C3 1uF
SHTDWN AGND NC AGDN
R17 27
R19 Open
C 11 47pF
8
C4 10nF 19 14 17 18 1 20
NC AGND
D-
9 PTE4
L3
5 C7 10uF
D1 9 HLMP-ED80
NC XY_LED
5 VDD
C16
C14
6
NC LED_GND
LVDD C5 1uF 7 VDDA RF_OFF RF_DATA MVDD ID Button R5 1M C6 10nF
C15 47uF
100nF
C13 47uF
100nF
Q1 MMBT3906 PTE1 7 RF_DATA VDDA
RF_OFF
PTA4
R23 10K
15
R24 10
1
VSS
RF Receiver Circuitry
RF Transmitter Circuitry
Notes The supply and ground paths should be laid out using a star topology. Figure 8. Schematic Diagram for Interface between ADNS-3040 and microcontroller
Regulatory Requirements * Passes FCC B and worldwide analogous emission limits when assembled into a mouse with shielded cable and following Agilent recommendations.
* Passes IEC-1000-4-3 radiated susceptibility level when assembled into a mouse with shielded cable and following Agilent recommendations. * Passes EN61000-4-4/IEC8014 EFT tests when assembled into a mouse with shielded cable and following Agilent recommendations.
Minimum -40 Maximum 85 260 Units C C V kV V mA
* UL flammability level UL94 V-0. * Provides sufficient ESD creepage/clearance distance to avoid discharge up to 15kV when assembled into a mouse according to usage instructions above.
Absolute Maximum Ratings
Parameter Storage Temperature Lead Solder Temp Supply Voltage ESD Input Voltage Latchup Current VIN IOUT -0.5 VDD -0.5 Symbol TS Notes
For 10 seconds, 1.6mm below seating plane. All pins, human body model MIL 883 Method 3015 All Pins All Pins
3.7 2 VDD+0.5 20
Recommended Operating Conditions
Parameter Operating Temperature Power supply voltage - for HLMP-ED80-PS000 LED * Power supply rise time Supply noise(Sinusoidal) Serial Port Clock Frequency Distance from lens reference plane to surface Speed Acceleration Load Capacitance Symbol TA VDD VRT VNA fSCLK Z S A COUT 2.3 2.4 Minimum Typical 0 2.6 0.001 Maximum Units 40 3.6 100 100 1 2.5 20 8 100 C Volts ms mV p-p MHz mm in/sec G pF MOTION, MISO Including noise. 0 to 2.6V 10kHz-50MHz Active drive, 50% duty cycle. Results in 0.2 mm DOF, See drawing below Notes
* Please note that for HSDL-4261 IR LED, the min power supply is 2.5V.
Sensor Lens 2.40 0.094
Object Surface
Figure 9. Distance from lens reference plane to surface
7
AC Electrical Specifications Electrical Characteristics over recommended operating conditions. Typical values at 25 C, VDD3=2.6V.
Parameter Motion delay after reset Shutdown Wake from shutdown Symbol tMOT-RST tSTDWN tWAKEUP 1 Minimum Typical Maximum Units 23 50 ms ms s
Notes From SW_RESET register write to valid motion, assuming motion is present From STDWN pin active to low current From STDWN pin inactive to valid motion. Notes: A RESET must be asserted after a shutdown. Refer to section "Notes on Shutdown and Forced Rest", also note tMOT-RST From RESTEN bits set to low current From RESTEN bits cleared to valid motion CL = 100pF CL = 100pF From SCLK falling edge to MISO data valid, no load conditions Data held until next falling SCLK edge Amount of time data is valid after SCLK rising edge From data valid to SCLK rising edge From rising SCLK for last bit of the first data byte, to rising SCLK for last bit of the second data byte. From rising SCLK for last bit of the first data byte, to rising SCLK for last bit of the second address byte. From rising SCLK for last bit of the first data byte, to falling SCLK for the first bit of the address byte of the next command. From rising SCLK for last bit of the address byte, to falling SCLK for first bit of data being read. Minimum NCS inactive time after motion burst before next SPI usage From NCS falling edge to first SCLK rising edge From last SCLK rising edge to NCS rising edge, for valid MISO data transfer From last SCLK rising edge to NCS rising edge, for valid MOSI data transfer From NCS rising edge to MISO high-Z state CL = 100pF CL = 100pF
Forced Rest enable Wake from Forced Rest MISO rise time MISO fall time MISO delay after SCLK MISO hold time MOSI hold time MOSI setup time SPI time between write commands SPI time between write and read commands SPI time between read and subsequent commands SPI read address-data delay NCS inactive after motion burst NCS to SCLK active SCLK to NCS inactive (for read operation) SCLK to NCS inactive (for write operation) NCS to MISO high-Z MOTION rise time MOTION fall time SHTDWN pulse width
tREST-EN tREST-DIS tr-MISO tf-MISO tDLY-MISO tHOLD-MISO tHOLD-MOSI tSETUP-MOSI tSWW tSWR tSRW tSRR tSRAD tBEXIT tNCS-SCLK tSCLK-NCS tSCLK-NCS tNCS-MISO tr-MOTION tF-MOTION tP-STDWN 1 150 150 0.5 200 120 30 20 500 150 150
1 1 300 300 120 1/fSCLK
s s ns ns ns s ns ns s s ns
4 500 120 120 20 500 300 300 45
s ns ns ns us ns ns ns s mA
Transient Supply Current IDDT
Max supply current during a VDD ramp from 0 to 2.6V
8
DC Electrical Specifications Electrical Characteristics over recommended operating conditions. Typical values at 25 C, VDD=2.6 V.
Parameter DC Supply Current in various modes
Symbol Minimum Typical IDD_RUN IDD_REST1 IDD_REST2 IDD_REST3 2.9 0.5 0.1 0.03
Maximum 10 1.8 0.4 0.15 40
Units mA
Notes Average current, including LED current. No load on MISO, MOTION. Peak current in 100kHz bandwidth, including LED current. SCLK, MOSI and NCS must be within 300mV of GND or VDD. STDWN must be within 300mV of VDD. SCLK, MOSI, NCS, STDWN SCLK, MOSI, NCS, STDWN SCLK, MOSI, NCS, STDWN Vin=VDD-0.6V, SCLK, MOSI, NCS, STDWN XY_LED pin voltage should be greater than 0.15V and less than 1.4V. XY_LED current is pulsed, so average value is much lower IOUT=1mA, MISO, MOTION IOUT=-1mA, MISO, MOTION MOSI, NCS, SCLK, STDWN
Peak Supply Current Shutdown Supply Current IDDSTDWN 1
mA A
12
Input Low Voltage Input High Voltage Input hysteresis Input leakage current XY_LED Current
VIL VIH VI_HYS Ileak ILAS VDD - 0.6 100 1 13
0.6
V V mV
10 25
A mA
Output Low Voltage Output High Voltage Input Capacitance
VOL VOH Cin VDD-0.7
0.7 10
V V pF
9
Typical Performance Characteristics
Mean Resolution vs Z 600 Black Formica 500
Resolution (Counts/inch)
White Melamine bookshelf 400 300 200 100 0 Manila White paper
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
-0.8
-0.7
-0.6
-0.5
-0.4
-0.3
-0.2
Distance from Lens Reference Plane to Surface, Z (mm)
Figure 10. Mean Resolution vs. Z (White Paper).
Typical Path Deviation Largest Single Perpendicular Deviation From A Straight Line At 45 Degrees Path Length = 4 inches; Speed = 6 ips ; Resolution = 400 cpi 60 50
Maximum distance (mouse count)
-0.1
0.9
1.0
Black Formica White Melamine bookshelf Manila
40 30
White paper 20 10 0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0.9 1.0
1000
Distance From Lens Reference Plane To Navigation Surface (mm)
Figure 11. Average error vs. distance (mm)
Relative Responsivity for ADNS-3040 1.0 0.9 0.8
Relative Responsivity
0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 400 500 600 700 Wavelength (nm) 800 900
Figure 12. Relative Responsivity 10
Power management modes The ADNS-3040 has three power-saving modes. Each mode has a different motion detection period, affecting response time to mouse motion (Response Time). The sensor automatically changes to the appropriate mode, depending on the time since the last reported motion (Downshift Time). The parameters of each mode are shown in the following table. Motion Pin Timing The motion pin is a levelsensitive output that signals the micro-controller when motion has occurred. The motion pin is lowered whenever the motion bit is set; in other words, whenever there is data in the Delta_X or Delta_Y registers. Clearing the motion bit (by reading Delta_Y and Delta_X, or writing to the Motion register) will put the motion pin high. LED Mode For power savings, the LED will not be continuously on. ADNS-3040 will flash the LED only when needed.
Mode Rest 1 Rest 2 Rest 3
Response Time (nominal) 16.5 ms 82 ms 410 ms
Downshift Time (nominal) 237 ms 8.4 s 504 s
Synchronous Serial Port The synchronous serial port is used to set and read parameters in the ADNS-3040, and to read out the motion information. The port is a four wire serial port. The host microcontroller always initiates communication; the ADNS3040 never initiates data transfers. SCLK, MOSI, and NCS may be driven directly by a micro-controller. The port pins may be shared with other SPI slave devices. When the NCS pin is high, the inputs are ignored and the output is tristated. The lines that comprise the SPI port: SCLK: Clock input. It is always generated by the master (the micro-controller). MOSI: Input data. (Master Out/Slave In) MISO: Output data. (Master In/Slave Out) NCS: Chip select input (active low). NCS needs to be low to activate the serial port; otherwise, MISO will be high Z, and MOSI & SCLK will be ignored. NCS can also be used to reset the serial port in case of an error.
Chip Select Operation The serial port is activated after NCS goes low. If NCS is raised during a transaction, the entire transaction is aborted and the serial port will be reset. This is true for all transactions. After a transaction is aborted, the normal address-to-data or transaction-to-transaction delay is still required before beginning the next transaction. To improve communication reliability, all serial transactions should be framed by NCS. In other words, the port should not remain enabled during periods of nonuse because ESD and EFT/B events could be interpreted as serial communication and put the chip into an unknown state. In addition, NCS must be raised after each burstmode transaction is complete to terminate burst-mode. The port is not available for further use until burst-mode is terminated.
11
Write Operation Write operation, defined as data going from the microcontroller to the ADNS-3040, is always initiated by the micro-controller and consists of two bytes. The first byte contains the address (seven bits) and has a "1" as its MSB to indicate data direction. The second byte contains the data. The ADNS-3040 reads MOSI on rising edges of SCLK.
Read Operation A read operation, defined as data going from the ADNS3040 to the micro-controller, is always initiated by the microcontroller and consists of two bytes. The first byte contains the address, is sent by the micro-controller over MOSI, and has a "0" as its MSB to indicate data direction. The second byte contains the data and is driven by the ADNS3040 over MISO. The sensor outputs MISO bits on falling edges of SCLK and samples MOSI bits on every rising edge of SCLK.
SCLK tHOLD MISO tDLY - MISO MISO D0
Figure 16. MISO Delay and Hold Time NOTE: The 0.5/fSCLK minimum high state of SCLK is also the minimum MISO data hold time of the ADNS-3040. Since the falling edge of SCLK is actually the start of the next read or write command, the ADNS-3040 will hold the state of data on MISO until the falling edge of SCLK.
NCS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2
SCLK MOSI MISO
1
A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
1
A6
MOSI Driven by Micro Controller
Figure 13. Write Operation
SCLK
MOSI tHold,MOSI tsetup,MOSI
Figure 14. MOSI Setup and Hold Time
NCS SCLK Cycle # SCLK MOSI MISO 0 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Figure 15. Read Operation
tSRAD delay
12
Required timing between Read and Write Commands There are minimum timing requirements between read and write commands on the serial port. If the rising edge of the SCLK for the last data bit of the second write command occurs before the required delay (tSWW), then the first write command may not complete correctly. If the rising edge of SCLK for the last address bit of the read command occurs before the required delay (tSWR), the write command may not complete correctly. During a read operation SCLK should be delayed at least tSRAD after the last address data bit to ensure that the ADNS-3040 has time to prepare the requested data. The falling edge of SCLK for the first address bit of either the read or write command must be at least tSRR or tSRW after the last SCLK rising edge of the last data bit of the previous read operation. Burst Mode Operation Burst mode is a special serial port operation mode that may be used to reduce the serial transaction time for a motion read. The speed improvement is achieved by continuous data clocking from multiple registers without the need to specify the register address, and by not requiring the normal delay period between data bytes. Burst mode is activated by reading the Motion_Burst register. The ADNS-3040 will respond with the contents of the Motion, Delta_Y, Delta_X, SQUAL, Shutter_Upper, Shutter_Lower and Maximum_Pixel registers in that order. The burst transaction can be terminated after the first 3 bytes of the sequence are read by bringing the NCS pin high. After sending the register address, the micro-controller must wait tSRAD and then begin reading data. All data bits can be
SCLK Address Write Operation Data
tSWW
Address
Data
Write Operation
Figure 17. Timing between two write commands
tSWR
SCLK Address Write Operation Data Address Next Read Operation
Figure 18. Timing between write and read commands
tSRW & tSRR tSRAD
SCLK Address Read Operation Data Address Next Read or Write Operation
Figure 19. Timing between read and either write or subsequent read commands
tSRAD SCLK Motion_Burst Register Address Read First Byte Read Second Byte Read Third Byte
First Read Operation
Figure 20. Motion Burst Timing
read with no delay between bytes by driving SCLK at the normal rate. The data is latched into the output buffer after the last address bit is received. After the burst transmission is complete, the micro-controller must raise the NCS line for at least tBEXIT to terminate burst mode. The serial port is not available for use until it is reset with NCS, even for a second burst transmission.
13
Notes on Power-up The ADNS-3040 does not perform an internal power up self-reset; the POWER_UP_RESET register must be written every time power is applied. The appropriate sequence is as follows: 1. Apply power 2. Drive NCS high, then low to reset the SPI port 3. Write 0x5a to register 0x3a 4. Read from registers 0x02, 0x03 and 0x04 (or read these same 3 bytes from burst motion register 0x42) one time regardless the state of the motion pin. During power-up there will be a period of time after the power supply is high but before any clocks are available. The table below shows the state of the various pins during power-up and reset.
State of Signal Pins After VDD is Valid
Pin NCS MISO SCLK MOSI XY_LED MOTION SHTDWN On Power-Up functional undefined ignored ignored undefined undefined must be low NCS high before reset high undefined ignored ignored undefined undefined must be low NCS Low before reset low functional functional functional undefined undefined After Reset functional depends on NCS depends on NCS depends on NCS functional functional
must be low functional
Notes on Shutdown and Forced Rest The ADNS-3040 can be set in Rest mode through the Configuration_Bits register (0x11). This is to allow for further power savings in applications where the sensor does not need to operate all the time. The ADNS-3040 can be set in Shutdown mode by asserting the SHTDWN pin. For proper operation, SHTDWN pulse width must be at least tSTDWN. Shorter pulse widths may cause the chip to enter an undefined state. In addition, the SPI port should not be accessed when SHTDWN is asserted. (Other ICs on the same SPI bus can be accessed, as long as the sensor's NCS pin is not asserted.) The table below shows the state of various pins during shutdown. After deasserting SHTDWN, a full reset must be initiated. Wait tWAKEUP before accessing the SPI port, then write 0x5A to the POWER_UP_RESET register. Any register settings must then be reloaded.
Pin NCS MISO SCLK MOSI XY_LED MOTION
SHTDWN active Functional* Undefined Undefined Undefined Low current Undefined
* NCS pin must be held to 1 (high) if SPI bus is shared with other devices. It can be in either state if the sensor is the only device in addition to the microcontroller. Note: There are long wakeup times from shutdown and forced Rest. These features should not be used for power management during normal mouse motion.
14
Registers The ADNS-3040 registers are accessible via the serial port. The registers are used to read motion data and status as well as to set the device configuration.
Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12-0x2d 0x2e 0x2f-0x38 0x3a 0x3b-0x3d 0x3e 0x3f 0x42 Register Product_ID Revision_ID Motion Delta_Y Delta_X SQUAL Shutter_Upper Shutter_Lower Maximum_Pixel Pixel_Sum Minimum_Pixel Pixel_Grab CRC0 CRC1 CRC2 CRC3 Self_Test Configuration_Bits Reserved Observation Reserved POWER_UP_RESET Reserved Inverse_Revision_ID Inverse_Product_ID Motion_Burst R R R 0xFD 0xF2 Any W R/W Any Read/Write R R R/W R R R R R R R R R/W R R R R W R/W 0x03 Default Value 0x0D 0x02 0x00 Any Any Any Any Any Any Any Any Any Any Any Any Any
15
Product ID Access: Read
Bit Field 7 PID7 6 PID6
Address: 0x00 Reset Value: 0x0D
5 PID5 4 PID4 3 PID3 2 PID2 1 PID1 0 PID0
Data Type: 8-Bit unsigned integer USAGE: This register contains a unique identification assigned to the ADNS-3040. The value in this register does not change; it can be used to verify that the serial communications link is functional.
Revision ID Access: Read
Bit Field 7 RID7 6 RID6
Address: 0x01 Reset Value: 0x02
5 RID5 4 RID4 3 RID3 2 RID2 1 RID1 0 RID0
Data Type: 8-Bit unsigned integer USAGE: This register contains the IC revision. It is subject to change when new IC versions are released.
16
Motion Access: Read/Write
Bit Field 7 MOT 6 PIXRDY
Address: 0x02 Reset Value: 0x00
5 PIXFIRST 4 OVF 3 Reserved 2 Reserved 1 Reserved 0 Reserved
Data Type: Bit field. USAGE: Register 0x02 allows the user to determine if motion has occurred since the last time it was read. If the MOT bit is set, then the user should read registers 0x03 and 0x04 to get the accumulated motion. Read this register before reading the Delta_Y and Delta_X registers. Writing anything to this register clears the MOT and OVF bits, Delta_Y and Delta_X registers. The written data byte is not saved. Internal buffers can accumulate more than eight bits of motion for X or Y. If either one of the internal buffers overflows, then absolute path data is lost and the OVF bit is set. This bit is cleared once some motion has been read from the Delta_X and Delta_Y registers, and if the buffers are not at full scale. Since more data is present in the buffers, the cycle of reading the Motion, Delta_X and Delta_Y registers should be repeated until the motion bit (MOT) is cleared. Until MOT is cleared, either the Delta_X or Delta_Y registers will read either positive or negative full scale. If the motion register has not been read for long time, at 400 cpi it may take up to 16 read cycles to clear the buffers, at 800 cpi, up to 32 cycles. To clear an overflow, write anything to this register. The PIXRDY bit will be set whenever a valid pixel data byte is available in the Pixel_Dump register. Check that this bit is set before reading from Pixel_Dump. To ensure that the Pixel_Grab pointer has been reset to pixel 0,0 on the initial write to Pixel_Grab, check to see if PIXFIRST is set to high.
Field Name MOT Description Motion since last report 0 = No motion 1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers Pixel Dump data byte is available in Pixel_Dump register 0 = data not available 1 = data available This bit is set when the Pixel_Grab register is written to or when the complete pixel array has been read, initiating an increment to pixel 0,0. 0 = Pixel_Grab data not from pixel 0,0 1 = Pixel_Grab data is from pixel 0,0 Motion overflow, Y and/or X buffer has overflowed since last report 0 = no overflow 1 = Overflow has occurred
PIXRDY
PIXFIRST
OVF
17
Delta Y access: Read
Bit Field 7 X7 6 X6
Address: 0x03 Reset Value: Undefined
5 X5 4 X4 3 X3 2 X2 1 X1 0 X0
Data Type: Eight bit 2's complement number. USAGE: Y movement is counts since last report. Absolute value is determined by resolution. Reading clears the register.
Motion
-128
-127
-2
-1
0
+1
+2
+126
+127
Delta_Y
80
81
FE
FF
00
01
02
7E
7F
NOTES: Agilent RECOMMENDS that registers 0x03 and 0x04 be read sequentially.
Delta X Access: Read
Bit Field 7 Y7 6 Y6
Address: 0x04 Reset Values: Undefined
5 Y5 4 Y4 3 Y3 2 Y2 1 Y1 0 Y0
Data Type: Eight bit 2's complement number. USAGE: X movement is counts since last report. Absolute value is determined by resolution. Reading clears the register.
Motion -128 -127 -2 -1 0 +1 +2 +126 +127
Delta_X
80
81
FE
FF
00
01
02
7E
7F
NOTES: Agilent RECOMMENDS that registers 0x03 and 0x04 be read sequentially.
18
SQUAL Access: Read
Bit Field 7 SQ7 6 SQ6
Address: 0x05 Reset Value: Undefined
5 SQ5 4 SQ4 3 SQ3 2 SQ2 1 SQ1 0 SQ0
Data Type: Upper 8 bits of a 9-bit unsigned integer. USAGE: SQUAL (Surface Quality) is a measure of the number of valid features visible by the sensor in the current frame. The maximum SQUAL register value is TBD. Since small changes in the current frame can result in changes in SQUAL, variations in SQUAL when looking at a surface are expected. The graph below shows 500 sequentially acquired SQUAL values, while a sensor was moved slowly over white paper. SQUAL is nearly equal to zero, if there is no surface below the sensor. SQUAL is typically maximized when the navigation surface is at the optimum distance from the imaging lens (the nominal Z-height).
100 90 80 70 60 50 40 30 20 10 0
SQUAL Value (white Paper)
Squal value
121
145
169
193
217
241
265
289
313
337
361
385
409
433
457
Count
Figure 21. SQUAL values (white paper)
Mean SQUAL vs Z (white paper) 60 50
Squal Value (count)
40 30 20 10 0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 Delta from Nominal Focus (mm)
Figure 22. Mean SQUAL vs. Z (white paper)
19
481
25
49
73
97
1
Shutter_Upper Access: Read
Bit Field 7 S 15 6 S 14
Address: 0x06 Reset Value: Undefined
5 S 13 4 S 12 3 S 11 2 S 10 1 S9 0 S8
Shutter_Lower Access: Read
Bit Field 7 S7 6 S6
Address: 0x07 Reset Value: Undefined
5 S5 4 S4 3 S3 2 S2 1 S1 0 S0
Data Type: Sixteen bit unsigned integer. USAGE: Units are clock cycles. Read Shutter_Upper first, then Shutter_Lower. They should be read consecutively. The shutter is adjusted to keep the average and maximum pixel values within normal operating ranges. The shutter value is automatically adjusted.
120 110 100 90 80 70 60 50 40 30 20
Shutter
Shutter value
121
145
169
193
217
241
265
289
313
337
361
385
409
433
457
0.8
Count figure 23. Shutter values (white paper) Mean Shutter vs Z (white Paper) 200
Shutter value (Count)
150
100
50
0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 Delta from Nominal Focus (mm) Figure 24. Mea n Shutter vs. Z (white paper)
20
481
25
49
73
97
1
Maximum Pixel Access: Read
Bit Field 7 MP7 6 MP6
address: 0x08 Reset Value: Underfined
5 MP5 4 MP4 3 MP3 2 MP2 1 MP1 0 MP0
Data Type: Eight-bit number. USAGE: Maximum Pixel value in current frame. Minimum value = 0, maximum value = 254. The maximum pixel value can vary with every frame.
Pixel_Sum Access: Read
Bit Field 7 AP7 6 AP6
Address: 0x09 Reset Value: Undefined
5 AP5 4 AP4 3 AP3 2 AP2 1 AP1 0 AP0
Data Type: High 8 bits of an unsigned 17-bit integer. USAGE: This register is used to find the average pixel value. It reports the seven bits of a 16bit counter, which sums all pixels in the current frame. It may be described as the full sum divided by 512. To find the average pixel value, use the following formula: Average Pixel = Register Value * 128/121 = Register Value * 1.06 The maximum register value is 240. The minimum is 0. The pixel sum value can change on every frame.
Minimum_Pixel Access: Read
Bit Field 7 MP7 6 MP6
Address: 0x0a Reset Value: Undefined
5 MP5 4 MP4 3 MP3 2 MP2 1 MP1 0 MP0
Data Type: Eight-bit number. USAGE: Minimum Pixel value in current frame. Minimum value = 0, maximum value = 254. The minimum pixel value can vary with every frame.
21
Pixel_Grab Access: Read/Write
Bit Field 7 PD7 6 PD6
Address: 0x0b Reset Value: Undefined
5 PD5 4 PD4 3 PD3 2 PD2 1 PD1 0 PD0
Data Type: Eight-bit word. USAGE: For test purposes, the sensor will read out the contents of the pixel array, one pixel per frame. To start a pixel grab, write anything to this register to reset the pointer to pixel 0,0. Then read the PIXRDY bit in the Motion register. When the PIXRDY bit is set, there is valid data in this register to read out. After the data in this register is read, the pointer will automatically increment to the next pixel. Reading may continue indefinitely; once a complete frame's worth of pixels has been read, PIXFIRST will be set to high to indicate the start of the first pixel and the address pointer will start at the beginning location again. Pixel Address Map (Looking through the ADNS-3120-001 Lens)
First Pixel 0 1 2 3 4 5 6 7 8 9 22 44 66 88 110 132 154 176 198 220 242 264 286 308 330 352 374 396 418 440 462 23 45 67 89 111 133 155 177 199 221 243 265 287 309 331 353 375 397 419 441 463 24 46 68 90 112 134 156 178 200 222 244 266 288 310 332 354 376 398 420 442 464 25 47 69 91 113 135 157 179 201 223 245 267 289 311 333 355 377 399 421 443 465 26 48 70 92 114 136 158 180 202 224 246 268 290 312 334 356 378 400 422 444 466 27 49 71 93 115 137 159 181 203 225 247 269 291 313 335 357 379 401 423 445 467 28 50 72 94 116 138 160 182 204 226 248 270 292 314 336 358 380 402 424 446 468 29 51 73 95 117 139 161 183 205 227 249 271 293 315 337 359 381 403 425 447 469 30 52 74 96 118 140 162 184 206 228 250 272 294 316 338 360 382 404 426 448 470 31 53 75 97 119 141 163 185 207 229 251 273 295 317 339 361 383 405 427 449 471
Top Xray View of Mouse
10 32 54 76 98 120 142 164 186 208 230 252 274 296 318 340 362 384 406 428 450 472 11 33 55 77 99 121 143 165 187 209 231 253 275 297 319 341 363 385 407 429 451 473 12 34 56 78 100 122 144 166 188 210 232 254 276 298 320 342 364 386 408 430 452 474 13 35 57 79 101 123 145 167 189 211 233 255 277 299 321 343 365 387 409 431 453 475 14 36 58 80 102 124 146 168 190 212 234 256 278 300 322 344 366 388 410 432 454 476 15 37 59 81 103 125 147 169 191 213 235 257 279 301 323 345 367 389 411 433 455 477 16 38 60 82 104 126 148 170 192 214 236 258 280 302 324 346 368 390 412 434 456 478 17 39 61 83 105 127 149 171 193 215 237 259 281 303 325 347 369 391 413 435 457 479 18 40 62 84 106 128 150 172 194 216 238 260 282 304 326 348 370 392 414 436 458 480 19 41 63 85 107 129 151 173 195 217 239 261 283 305 327 349 371 393 415 437 459 481 20 42 64 86 108 130 152 174 196 218 240 262 284 306 328 350 372 394 416 438 460 482 21 43 65 87 109 131 153 175 197 219 241 263 285 307 329 351 373 395 417 439 461 483 Last Pixel
P O S I T I V E Y
LB
RB
1
20
A3040 YYWW
10
11
POSITIVE X
CRC0 Access: Read
Bit Field 7 CRC07 6 CRC06
Address: 0x0c Reset Value: Undefined
5 CRC05 4 CRC04 3 CRC03 2 CRC02 1 CRC01 0 CRC00
Data Type: Eight-bit number USAGE: Register 0x0c reports the first byte of the system self test results. Value = 0xAF. See Self Test register 0x10.
22
CRC1 Access: Read
Bit Field 7 CRC17 6 CRC16
Address: 0x0d Reset Value: Undefined
5 CRC15 4 CRC14 3 CRC13 2 CRC12 1 CRC11 0 CRC10
Data Type: Eight bit number USAGE: Register 0x0c reports the second byte of the system self test results. Value = 0x4E. See Self Test register 0x10. CRC2 Access: Read
Bit Field 7 CRC27 6 CRC26
Address: 0x0e Reset Value: Undefined
5 CRC25 4 CRC24 3 CRC23 2 CRC22 1 CRC21 0 CRC20
Data Type: Eight-bit number USAGE: Register 0x0e reports the third byte of the system self test results. Value = 0x31. See Self Test register 0x10.
CRC3 Access: Read
Bit Field 7 CRC37 6 CRC36
Address: 0x0f Reset Value: Undefined
5 CRC35 4 CRC34 3 CRC33 2 CRC32 1 CRC31 0 CRC30
Data Type: Eight-bit number USAGE: Register 0x0f reports the fourth byte of the system self test results. Value = 0x22. See Self Test register 0x10.
23
Self_Test Access: Write
Bit Field 7 Reserved 6 Reserved
Address: 0x10 Reset Value: NA
5 Reserved 4 Reserved 3 Reserved 2 Reserved 1 Reserved 0 TESTEN
Data Type: Bit field USAGE: Set the TESTEN bit in register 0x10 to start the system self-test. The test takes 250ms. During this time, do not write or read through the SPI port. Results are available in the CRC0-3 registers. After self-test, reset the chip to start normal operation.
Field Name TESTEN Description Enable System Self Test 0 = Disable 1 = Enable
Configuration_bits Access: Read/Write
Bit Field 7 RES 6 Reserved
Address: 0x11 Reset Value: 0x03
5 RESTEN1 4 RESTEN0 3 Reserved 2 Reserved 1 Reserved 0 Reserved
Data Type: Bit field USAGE: Register 0x11 allows the user to change the configuration of the sensor. Setting the RESTEN bit forces the sensor into Rest mode, as described in the power modes section above. The RES bit allows selection between 400 and 800 cpi resolution. Note: Forced Rest has a long wakeup time and should not be used for power management during normal mouse motion.
Field Name Description RESTEN1-0 Puts chip into Rest mode 00 = normal operation 01 = force Rest1 10 = force Rest2 11 = force Rest3 RES Sets resolution 0 = 400 1 = 800
Reserved
Address: 0x12-0x2d
24
Observation Access: Read/Write
Bit Field 7 MODE1 6 MODE0
Address: 0x2e Reset Value: Undefined
5 Reserved 4 Reserved 3 OBS3 2 OBS2 1 OBS1 0 OBS0
Data Type: Bit field USAGE: Register 0x2e provides bits that are set every frame. It can be used during EFTB testing to check that the chip is running correctly. Writing anything to this register will clear the bits.
Field Name Description MODE1-0 Mode Status: Reports which mode the sensor is in. 00 = Run 01 = Rest1 10 = Rest2 11 = Rest3 Set every frame
OBS3-0
Reserved
Address: 0x2f-0x39
POWER_UP_RESET Access: Write
Bit Field 7 RST7 6 RST6
Address: 0x3a Reset Value: Undefined
5 RST5 4 RST4 3 RST3 2 RST2 1 RST1 0 RST0
Data Type: 8-bit integer USAGE: Write 0x5A to this register to reset the chip. All settings will revert to default values.
Inverse_Revision_ID Access: Read
Bit Field 7 NRID7 6 NRID6
Address: 0x3e Reset Value: 0xFD
5 NRID5 4 NRID4 3 NRID3 2 NRID2 1 NRID1 0 NRID0
Data Type: Inverse 8-Bit unsigned integer USAGE: This value is the inverse of the Revision_ID. It can be used to test the SPI port.
25
Inverse_Product_ID Access: Read
Bit Field 7 NPID7 6 NPID6
Address: 0x3f Reset Value: 0xF2
5 NPID5 4 NPID4 3 NPID3 2 NPID2 1 NPID1 0 NPID0
Data Type: Inverse 8-Bit unsigned integer USAGE: This value is the inverse of the Product_ID. It can be used to test the SPI port.
Motion_Burst Access: Read
Bit Field 7 MB7 6 MB6
Address: 0x42 Reset Value: Any
5 MB5 4 MB4 3 MB3 2 MB2 1 MB1 0 MB0
Data Type: Various. USAGE: Read from this register to activate burst mode. The sensor will return the data in the Motion register, Delta_Y, Delta_X, Squal, Shutter_Upper, Shutter_Lower, and Maximum_Pixel. A minimum of 3 bytes should be read during a burst read. Reading the first 3 bytes clears the motion data.
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For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (916) 788-6763 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6756 2394 India, Australia, New Zealand: (+65) 6755 1939 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6755 1989 Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+65) 6755 2044 Taiwan: (+65) 6755 1843 Data subject to change. Copyright (c) 2005 Agilent Technologies, Inc. August 23, 2005 5989-3540EN

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